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INDIA AffairsPublished November 11, 2026•9 min read

Project Indicus: India Clears ₹1.27 Lakh Crore 'Semicon 2.0' to Build Indigenous Military Silicon and AI Superclusters

As DRDO alerts government to foreign chip vulnerabilities in BrahMos and Tejas Mk-2 guidance systems, the Union Cabinet greenlights Semicon 2.0. With Tata-PSMC Dholera fab rising and Micron-Kaynes OSAT facilities operational in Sanand, New Delhi mandates sovereign AI accelerators within 24 months.

Dr. Aris Thorne & Tech Strategy Desk

Dr. Aris Thorne & Tech Strategy Desk

Chief Analyst, Semiconductor Geopolitics & Critical Supply Chains

Project Indicus: India Clears ₹1.27 Lakh Crore 'Semicon 2.0' to Build Indigenous Military Silicon and AI Superclusters
High-density defense-grade microprocessor module under inspection. Under the ₹1.27 lakh crore Semicon 2.0 outlay, India is shifting from assembly packaging to sovereign front-end wafer fabrication and strategic silicon design.

Strategic Executive Summary

  • ▪The Union Cabinet has officially expanded the India Semiconductor Mission to ₹1,27,500 crore ($15.2 billion), pivoting from commercial packaging subsidies to strategic chip design, machinery, and specialty materials.
  • ▪Former DRDO leadership raised critical defense alarms: BrahMos Block-III, Astra Mk-2 missiles, and the Sudarshan Chakra national air-defense grid rely on foreign microprocessors vulnerable to covert backdoors and wartime supply embargoes.
  • ▪Tata Electronics' ₹91,000 crore 300mm wafer fab at Dholera, Gujarat (built in partnership with Taiwan's PSMC) accelerates civil construction, targeting 50,000 wafer starts per month on 28nm, 40nm, and 55nm high-reliability automotive and defense nodes.
  • ▪MeitY's newly opened portals under Semicon 2.0 mandate the delivery of a homegrown Indian GPU within 24 months, aiming to insulate domestic sovereign AI clusters and high-performance computing centers.

Key Figures Driving India's Semiconductor Sovereignity

Visual Intelligence Profile
Ashwini VaishnawPolicy & Capital Architecture

Ashwini Vaishnaw

Union Minister for Electronics, IT & Railways

Architect of Semicon 1.0 and 2.0, steering the ₹1.27 lakh crore fiscal incentive framework and negotiating bilateral technology transfer pacts with Taiwan, Japan, and the United States.

N. ChandrasekaranIndustrial Manufacturing

N. Chandrasekaran

Chairman, Tata Sons & Tata Electronics

Leading India's first commercial front-end 300mm fab in Dholera and the massive TSAT advanced packaging hub in Assam, investing over $14B across the domestic semiconductor stack.

Dr. Samir V. KamatStrategic Defense Imperative

Dr. Samir V. Kamat

Chairman, Defence Research & Development Organisation (DRDO)

Spearheading the mandate to purge untrusted foreign microcontrollers from missile guidance computers, airborne active electronically scanned array (AESA) radars, and electronic warfare suites.

Sanjay MehrotraGlobal Supply Integration

Sanjay Mehrotra

President & CEO, Micron Technology

Overseeing the commercial ramp-up of Micron's $2.75 billion advanced packaging and testing facility in Sanand, establishing India's first operational tier-one semiconductor export line.

SEMICON 2.0 ARCHITECTURE

From Silicon Ingot to Supersonic Guidance: India's 4-Tier Chip Ecosystem

Geoprimer Flow Analytics
1Tier 1
Front-End Wafer Fabrication (Dholera, Gujarat)

Tata-PSMC 300mm commercial foundry producing 28nm/40nm/55nm nodes at 50,000 wafer starts/month for defense, electric mobility, and power management.

₹91,000 Cr Outlay
2Tier 2
Advanced ATMP & OSAT Packaging (Sanand & Assam)

Micron and Kaynes commercial facilities packaging flip-chip, BGA, and 2.5D multi-die modules with zero-defect automotive qualification.

3 Facilities Live
3Tier 3
Strategic Defense Hardening (SSPL & GAETEC)

DRDO's Solid State Physics Laboratory and Gallium Arsenide Enabling Technology Centre validating radiation-tolerant, tamper-evident ASICs.

MIL-STD-883 Certified
4Tier 4
Weapon System & Sovereign AI Deployment

Direct integration into BrahMos Block-III guidance units, Tejas Mk-2 mission computers, Uttam AESA radars, and sovereign AI computing clusters.

24-Month GPU Goal

Source: Ministry of Electronics & IT (MeitY) & DRDO Directorate of Advanced Technologies

1. The Vulnerability Paradigm: Why Defense Mandated Semicon 2.0

In closed-door national security briefings presented to the Cabinet Committee on Security (CCS), defense technologists delivered an unsettling reality check: despite record domestic defense export figures, India's most lethal deterrents—from the Mach 3 BrahMos supersonic cruise missile to the Uttam AESA radar aboard the Tejas Mk-2—remain critically tethered to imported microcontrollers and foreign FPGA substrates.

In the event of a high-intensity conflict or geopolitical embargo, international supply lines could be severed within days. More insidiously, unverified overseas semiconductor manufacturing exposes strategic weapon systems to cryptographic backdoors and kill-switch microcode. Recognizing that true military sovereignty is impossible without silicon independence, the government cleared 'Semicon 2.0' with an expanded ₹1,27,500 crore commitment.

⚡ Key Intelligence Marker
"A nation that cannot fabricate its own defense microchips does not own its own missiles. Sovereign silicon is the bedrock of 21st-century strategic autonomy."

— Former Senior Scientific Advisor, Ministry of Defence

2. The Dholera Engine: Inside Tata-PSMC's 300mm Cleanrooms

The epicenter of India's front-end manufacturing revolution is Dholera Special Investment Region (DSIR) in Gujarat, where Tata Electronics' ₹91,000 crore wafer fab is rising. Partnered with Taiwan's Powerchip Semiconductor Manufacturing Corporation (PSMC), the facility will feature India's first 300mm commercial cleanroom lines.

Rather than pursuing sub-3nm nodes that require billions in leading-edge EUV lithography with limited defense utility, Dholera's initial roadmap focuses on mature, high-yield nodes: 28nm, 40nm, 55nm, and 90nm. These are the mission-critical nodes that power automotive ECUs, radar transceivers, telecom base stations, and satellite guidance processors. At full operational tempo, Dholera will churn out 50,000 wafer starts per month.

Engineers inside an advanced semiconductor cleanroom environment. Tata Electronics and PSMC have accelerated structural construction at Dholera to initiate tool move-in ahead of schedule.
Engineers inside an advanced semiconductor cleanroom environment. Tata Electronics and PSMC have accelerated structural construction at Dholera to initiate tool move-in ahead of schedule.

3. The OSAT Frontline: Micron, Kaynes, and Component Localization

While front-end fabs take 36 to 48 months to achieve full yield, India's backend packaging and testing (ATMP/OSAT) ecosystem has already commenced commercial shipments. In Sanand, Micron Technology's state-of-the-art packaging complex is packaging high-speed memory and storage modules for global tier-one supply chains.

Concurrently, Kaynes Semicon has commenced commercial operations in Sanand, focusing on specialized multi-chip packaging, ball grid arrays (BGA), and quad flat no-lead (QFN) solutions for aerospace, automotive, and defense clients. Under the newly opened portals of Semicon 2.0, the Ministry of Electronics and IT (MeitY) has introduced deep subsidies for domestic chemicals, specialty gases, copper foils, and multi-layer PCBs—ensuring that the ancillary supply chain is as resilient as the chips themselves.

⚡ Key Intelligence Marker
"India's domestic electronics manufacturing output has expanded from $30 billion in 2014 to over $115 billion in 2026, with semiconductor value addition projected to exceed 35% by 2028."

— India Semiconductor Mission Annual Industry Benchmark

4. The Sovereign GPU Moonshot: Breaking the Global Compute Monopoly

Perhaps the most radical departure in Semicon 2.0 is the official mandate to design and tape out a homegrown Indian Graphics Processing Unit (GPU) within 24 months. As the United States and China lock horns over AI accelerator export bans, India's sovereign data sovereignty demands compute architectures that cannot be remotely geofenced or throttled.

Led by a consortium of domestic chip design startups, the Centre for Development of Advanced Computing (C-DAC), and academic powerhouses like IIT Madras (architects of the SHAKTI processor), Project Indicus is developing a dedicated AI tensor processing architecture. As front-end silicon, defense hardening, and advanced packaging converge, India is charting an irreversible path from a digital consumer to an indispensable semiconductor citadel.

Filed Under:INDIA Affairs#Semicon 2.0#Tata Electronics#Dholera Fab#DRDO#BrahMos#Micron#Chip War#India
Dr. Aris Thorne & Tech Strategy Desk

Dr. Aris Thorne & Tech Strategy Desk

OSINT Verified Desk

Chief Analyst, Semiconductor Geopolitics & Critical Supply Chains

Senior contributor to the INDIA Affairs desk at Geoprimer, covering semicon 2.0, tata electronics, dholera fab and primary-source verification under our Editorial & Verification Charter.

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